Business Wire

Keysight Introduces Chiplet PHY Designer for Simulating D2D to D2D PHY IP Supporting the UCIe™ Standard

Chiplet PHY simulator addresses the effects of forward clocking with single-ended signaling and higher bit error rate on die-to-die interconnect performance of ...
Business Wire

Keysight Introduces PCIe Designer and Chiplet PHY Designer for Digital Standards-Driven Simulation Workflows

Improves PCIe design productivity using a smarter and streamlined workflow with simulation-driven virtual compliance test solutions Supports design exploration and report generation that speeds ...
EDN

PXI-Express PHY: Essential PCB design considerations

This article introduces the basic concept of PXI-Express (PCI eXtensions for Instrumentation-Express) and studies the key considerations for modular hardware PCB layout design to achieve PXI-Express ...
Yahoo Finance

Keysight Upgrades Chiplet PHY Designer With Enhanced Support

Keysight Technologies, Inc. KEYS recently launched the latest version of its Chiplet PHY Designer 2025, a cutting-edge solution for enhancing high-speed digital chiplet design for AI and data center ...
Electronic Design

EDA Helps Cultivate the Future of Die-to-Die Connectivity

Check out our coverage of DesignCon 2024. This article is also part of the TechXchange: Chiplets - Electronic Design Automation Insights. Today, many of the world’s most advanced processors are no ...
Electronic Design

Tektronix releases MIPI C-PHY TX test solution

Tektronix Inc. today announced what it calls the industry’s first commercially available oscilloscope-based solution for MIPI C-PHY physical layer transmitter characterization and debugging. The new ...
EDN

Implementing an all-digital PHY and delay-locked loop for high-speed DDR2/3 memory interfaces

A high-speed DDR2, DDR2/3, or DDR3 DRAM interface for off-chip memory provides a powerful tool to meet the high-performance demands of new electronic products. However, with advancements come new ...