EDN

Random-data generator facilitates eye diagram test

The eye diagram, one of the best figures of merit for evaluating robustness in a digital data link, shows a single bit window (bit N), preceded by a random-value bit (N-1) and followed by a ...
Nature

Signal Integrity and Eye Diagram Analysis in High-Speed Interconnects

Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...
EDN

Analyzer generates clean eye diagrams

Teamed with the G0361A 64-Gbaud, 2-bit DAC, Anritsu’s MP1800A signal-quality analyzer accurately verifies high-speed interconnects and backplanes. The combination generates extremely clean eye ...
Electronic Design

Eye-Diagram Analysis Speeds DDR SDRAM Validation

Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to ...
Electronic Design

Conformance test failed. What now?

Conformance tests represent an important milestone during product development. The relevant standardization committees have published detailed test specifications for many interfaces such as USB and ...